Integrated Circuit output buffers are often coupled to an off-chip pull-up resistor. This pull-up resistor will effect the performance of the output buffer, since it speeds up the low-to-high transition and slows down the high-to-low transition of signals output by the buffer. For buffers having very tight specifications on rise and fall times, or on duty cycle distortion, the performance changes caused by the pull-up resistor are problematic. The usual solution is to design a buffer that compensates for a known pull-up resistor having a defined resistance value, so that the performance distortion caused by the known pull-up resistor is reduced.
However, there are some systems, such as the ATA bus widely used in Mass Storage applications, where the value of the pull-up resistor is unknown and can vary widely. This variation in pull-up resistor value adversely affects the performance of output buffers because the output buffers are not designed to accurately account for distortions caused by a pull-up resistor having an unknown or variable resistance. The inability of known output buffers to account for pull-up resistors having an unknown value only gets worse as the speed of data transmission increases, since the percentage of distortion increases as the pulse width narrows.
Accordingly, there exists a need for an improved output buffer that accounts for pull-up resistors having an unknown or variable resistance.